Intel: By 2030, the x86 architecture is expected to power 80% of the data centre servers

According to information from IT House on 3 June, according to the Korean media, The Elec (3 days) evening, Intel CEO Chen Liwiu, in a keynote speech at the 2026 Taipei International Computer Fair, indicated that, by 2030, for every 10 newly deployed data centre servers, 8 are expected to be based on x86 structures, which will support modern computing loads, covering a variety of scenarios from basic processing tasks to emerging AI applications.

The report notes that Intel based this judgement on two main points: the long-established reliability of the x86 architecture. Over the past 50 years, x86 has been the core foundation of data centre servers, supporting the continued operation of critical tasks such as telecommunications networks, databases and cloud services. Around x86, Intel has also built a vast ecology of software and infrastructure.

The second is that the architecture of x86 continues to innovate. Intel states that since the launch of the Intel 8086 processor in 1978, x86 has been evolving and remains the best option to run the AI task load of the smart body.

Intel Data Centre and AI Executive Vice President and Managing Director, Kevark Ketchian, said: “Traditional AI reasoning is relatively simple, but the intelligent AI operates in fundamentally different ways. Smart AI will use tools, read and write files and validate rules, and these tasks are traditionally performed by x86 CPU Deal.”

In the traditional AI reasoning scene,GPU The calculator ratio with CPU is approximately 7 to 1, with a clear bias towards GPU. In the smart AI system, however, if it involves code compilation and testing, the calculator ratio may reverse to a maximum of 1 to 1.3, and CPU will need to take on a greater computing pressure.

The IT House understands that, in order to adapt to this change, Intel launched the next generation data centre processor up to the strength of 6+ “Clarwater Forest”. The processor is based on the 18A process at Intelde, with a maximum of 288 energy-efficient Darkmont E and 576MB level III caches.

Intel also launched the “Rack Scale Blueprint”. Under this plan, Intel no longer designs a single chip or single server, but designs and delivers an entire shelf system with multiple servers as a unified platform. Intel stated that the package was based on open standards rather than the proprietary specifications of a particular company and that data centres could be deployed directly.

Also, Intel officially announced its entry into the customized ASIC market. For its part, Intel announced the design and supply of the Infrastructure Processing Module (IPU) for a large Google data centre with tangible results. These IPUs are currently deployed in the production data centre environment. Intel is also working with Ericsson to develop the next generation of ASIC for wireless communications infrastructure.

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